gcc, arm, pristup k periferiim
Jaroslav Buchta
jaroslav.buchta na hascomp.cz
Pátek Srpen 17 13:09:36 CEST 2018
Mozna zacinam chapat, proc v tech knihovnach pouzivaji vesmes pomocnou
promennou, do ktere to nejdriv vyskladaji...
Jak donutit prekladac k zapisu vysledku nejakeho vyrazu najednou,
netusim. Mozna na to je nejaky attribut, ktery by se pouzil k prvku
struktury nebo na celou strukturu. Mozna je to i tim, ze struktura nema
attribut zarovnani na 4B. A take mne prekvapuje, ze to tedy neresi to
volatile, protoze prekladac nema predpokladat, ze tam bude to, co tam
minule zapsal...
Dne 17.08.2018 v 12:30 Jan Smrz napsal(a):
> Jedna se o cast HAL knihovny (stm32l0xx_hal_spi.c).
>
> Relevantni casti:
>
> #define __IO volatile /*!< Defines 'read / write'
> permissions */
>
> typedef struct
> {
> __IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S
> mode), Address offset: 0x00 */
> __IO uint32_t CR2; /*!< SPI Control register
> 2, Address offset: 0x04 */
> __IO uint32_t SR; /*!< SPI Status
> register, Address offset: 0x08 */
> __IO uint32_t DR; /*!< SPI data
> register, Address offset: 0x0C */
> __IO uint32_t CRCPR; /*!< SPI CRC polynomial register (not used
> in I2S mode), Address offset: 0x10 */
> __IO uint32_t RXCRCR; /*!< SPI Rx CRC register (not used in I2S
> mode), Address offset: 0x14 */
> __IO uint32_t TXCRCR; /*!< SPI Tx CRC register (not used in I2S
> mode), Address offset: 0x18 */
> __IO uint32_t I2SCFGR; /*!< SPI_I2S configuration
> register, Address offset: 0x1C */
> __IO uint32_t I2SPR; /*!< SPI_I2S prescaler
> register, Address offset: 0x20 */
> } SPI_TypeDef;
>
>
> typedef struct __SPI_HandleTypeDef
> {
> SPI_TypeDef *Instance; /*!< SPI registers base
> address */
> SPI_InitTypeDef Init; /*!< SPI communication
> parameters */
> uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx
> transfer Buffer */
> uint16_t TxXferSize; /*!< SPI Tx transfer size */
> __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */
> uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx
> transfer Buffer */
> uint16_t RxXferSize; /*!< SPI Rx transfer size */
> __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */
> DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA handle
> parameters */
> DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA handle
> parameters */
> void (*RxISR)(struct __SPI_HandleTypeDef *
> hspi); /*!< function pointer on Rx ISR */
> void (*TxISR)(struct __SPI_HandleTypeDef *
> hspi); /*!< function pointer on Tx ISR */
> HAL_LockTypeDef Lock; /*!< SPI locking object */
> __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */
> __IO uint32_t ErrorCode; /*!< SPI Error code */
> }SPI_HandleTypeDef;
>
>
> #define WRITE_REG(REG, VAL) ((REG) = (VAL))
>
>
> HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
> {
> ....
> WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode |
> hspi->Init.Direction | hspi->Init.DataSize |
> hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS &
> SPI_CR1_SSM) |
> hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit |
> hspi->Init.CRCCalculation) );
> ...
> }
>
>
> Makro WRITE_REG se prelozi takto:
>
>
> 277:../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c ****
> hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS &
> 547 .loc 1 277 0
> 548 007a 6178 ldrb r1, [r4, #1] @ *hspi_4(D),
> *hspi_4(D)
> 549 007c 2778 ldrb r7, [r4] @ *hspi_4(D), *hspi_4(D)
> 550 007e A378 ldrb r3, [r4, #2] @ *hspi_4(D),
> *hspi_4(D)
> 551 0080 0902 lsls r1, r1, #8 @ tmp237, *hspi_4(D),
> 552 0082 3943 orrs r1, r7 @ tmp237, *hspi_4(D)
> 553 0084 1B04 lsls r3, r3, #16 @ tmp240, *hspi_4(D),
> 554 0086 0B43 orrs r3, r1 @ tmp240, tmp238
> 555 0088 1900 movs r1, r3 @ tmp241, tmp240
> 556 008a 6679 ldrb r6, [r4, #5] @ tmp247,
> 557 008c E378 ldrb r3, [r4, #3] @ *hspi_4(D),
> *hspi_4(D)
> 558 008e 3602 lsls r6, r6, #8 @ tmp248, tmp247,
> 559 0090 1B06 lsls r3, r3, #24 @ tmp243, *hspi_4(D),
> 560 0092 0B43 orrs r3, r1 @ tmp244, tmp241
> 561 0094 3100 movs r1, r6 @ tmp248, tmp248
> 562 0096 2779 ldrb r7, [r4, #4] @ tmp246,
> 272:../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c ****
> 563 .loc 1 272 0
> 564 0098 0020 movs r0, #0 @ tmp199,
> 277:../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c ****
> hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS &
> 565 .loc 1 277 0
> 566 009a 3943 orrs r1, r7 @ tmp248, tmp246
> 567 009c A779 ldrb r7, [r4, #6] @ tmp250,
> 568 009e 3F04 lsls r7, r7, #16 @ tmp251, tmp250,
> 569 00a0 3E00 movs r6, r7 @ tmp251, tmp251
> 570 00a2 E779 ldrb r7, [r4, #7] @ tmp253,
> 571 00a4 0E43 orrs r6, r1 @ tmp251, tmp249
> 572 00a6 3F06 lsls r7, r7, #24 @ tmp254, tmp253,
> 573 00a8 3743 orrs r7, r6 @ D.8647, tmp252
> 574 00aa 667A ldrb r6, [r4, #9] @ tmp258,
> 575 00ac 217A ldrb r1, [r4, #8] @ tmp257,
> 576 00ae 3602 lsls r6, r6, #8 @ tmp259, tmp258,
> 577 00b0 0E43 orrs r6, r1 @ tmp260, tmp257
> 578 00b2 A17A ldrb r1, [r4, #10] @ tmp261,
> 579 00b4 0904 lsls r1, r1, #16 @ tmp262, tmp261,
> 580 00b6 0E43 orrs r6, r1 @ tmp263, tmp262
> 581 00b8 E17A ldrb r1, [r4, #11] @ tmp264,
> 582 00ba 0906 lsls r1, r1, #24 @ tmp265, tmp264,
> 583 00bc 3143 orrs r1, r6 @ D.8647, tmp263
> 584 00be 667B ldrb r6, [r4, #13] @ tmp270,
> 585 00c0 3943 orrs r1, r7 @ D.8647, D.8647
> 586 00c2 277B ldrb r7, [r4, #12] @ tmp269,
> 587 00c4 3602 lsls r6, r6, #8 @ tmp271, tmp270,
> 588 00c6 3E43 orrs r6, r7 @ tmp272, tmp269
> 589 00c8 A77B ldrb r7, [r4, #14] @ tmp273,
> 590 00ca 3F04 lsls r7, r7, #16 @ tmp274, tmp273,
> 591 00cc 3743 orrs r7, r6 @ tmp275, tmp272
> 592 00ce E67B ldrb r6, [r4, #15] @ tmp276,
> 593 00d0 3606 lsls r6, r6, #24 @ tmp277, tmp276,
> 594 00d2 3E43 orrs r6, r7 @ D.8647, tmp275
> 595 00d4 3143 orrs r1, r6 @ D.8647, D.8647
> 596 00d6 0F00 movs r7, r1 @ D.8647, D.8647
> 597 00d8 617C ldrb r1, [r4, #17] @ tmp282,
> 598 00da 267C ldrb r6, [r4, #16] @ tmp281,
> 599 00dc 0902 lsls r1, r1, #8 @ tmp283, tmp282,
> 600 00de 3143 orrs r1, r6 @ tmp284, tmp281
> 601 00e0 A67C ldrb r6, [r4, #18] @ tmp285,
> 602 00e2 3604 lsls r6, r6, #16 @ tmp286, tmp285,
> 603 00e4 3143 orrs r1, r6 @ tmp287, tmp286
> 604 00e6 E67C ldrb r6, [r4, #19] @ tmp288,
> 605 00e8 3606 lsls r6, r6, #24 @ tmp289, tmp288,
> 606 00ea 0E43 orrs r6, r1 @ D.8647, tmp287
> 607 00ec 3E43 orrs r6, r7 @ D.8647, D.8647
> 608 00ee 677D ldrb r7, [r4, #21] @ tmp294,
> 609 00f0 217D ldrb r1, [r4, #20] @ tmp293,
> 610 00f2 3F02 lsls r7, r7, #8 @ tmp295, tmp294,
> 611 00f4 0F43 orrs r7, r1 @ tmp296, tmp293
> 612 00f6 A17D ldrb r1, [r4, #22] @ tmp297,
> 613 00f8 0904 lsls r1, r1, #16 @ tmp298, tmp297,
> 614 00fa 0F43 orrs r7, r1 @ tmp299, tmp298
> 615 00fc E17D ldrb r1, [r4, #23] @ tmp300,
> 616 00fe 0906 lsls r1, r1, #24 @ tmp301, tmp300,
> 617 0100 3943 orrs r1, r7 @ D.8647, tmp299
> 618 0102 0E43 orrs r6, r1 @ D.8647, D.8647
> 619 0104 B446 mov ip, r6 @ D.8647, D.8647
> 620 0106 667F ldrb r6, [r4, #29] @ tmp306,
> 621 0108 217F ldrb r1, [r4, #28] @ tmp305,
> 622 010a 3602 lsls r6, r6, #8 @ tmp307, tmp306,
> 623 010c 0E43 orrs r6, r1 @ tmp307, tmp305
> 624 010e A17F ldrb r1, [r4, #30] @ tmp309,
> 625 0110 0904 lsls r1, r1, #16 @ tmp310, tmp309,
> 626 0112 3143 orrs r1, r6 @ tmp310, tmp308
> 627 0114 0E00 movs r6, r1 @ tmp311, tmp310
> 628 0116 E17F ldrb r1, [r4, #31] @ tmp312,
> 629 0118 0906 lsls r1, r1, #24 @ tmp313, tmp312,
> 630 011a 3143 orrs r1, r6 @ D.8647, tmp311
> 631 011c 6646 mov r6, ip @ D.8647, D.8647
> 632 011e 3143 orrs r1, r6 @ D.8647, D.8647
> 633 0120 661C adds r6, r4, #1 @ tmp318, hspi,
> 634 0122 F77F ldrb r7, [r6, #31] @ tmp319,
> 635 0124 A61C adds r6, r4, #2 @ tmp320, hspi,
> 636 0126 F67F ldrb r6, [r6, #31] @ tmp321,
> 637 0128 3602 lsls r6, r6, #8 @ tmp322, tmp321,
> 638 012a 3E43 orrs r6, r7 @ tmp323, tmp319
> 639 012c E71C adds r7, r4, #3 @ tmp324, hspi,
> 640 012e FF7F ldrb r7, [r7, #31] @ tmp325,
> 641 0130 3F04 lsls r7, r7, #16 @ tmp326, tmp325,
> 642 0132 3E43 orrs r6, r7 @ tmp327, tmp326
> 643 0134 271D adds r7, r4, #4 @ tmp328, hspi,
> 644 0136 FF7F ldrb r7, [r7, #31] @ tmp329,
> 645 0138 3F06 lsls r7, r7, #24 @ tmp330, tmp329,
> 646 013a 3743 orrs r7, r6 @ D.8647, tmp327
> 647 013c 2600 movs r6, r4 @ tmp337, hspi
> 648 013e 0F43 orrs r7, r1 @ D.8647, D.8647
> 649 0140 2100 movs r1, r4 @ tmp339, hspi
> 650 0142 0836 adds r6, r6, #8 @ tmp337,
> 651 0144 0196 str r6, [sp, #4] @ tmp337, %sfp
> 652 0146 2831 adds r1, r1, #40 @ tmp339,
> 653 0148 0978 ldrb r1, [r1] @ tmp340,
> 654 014a 8C46 mov ip, r1 @ tmp340, tmp340
> 655 014c 2100 movs r1, r4 @ tmp343, hspi
> 656 014e 6646 mov r6, ip @ tmp340, tmp340
> 657 0150 2931 adds r1, r1, #41 @ tmp343,
> 658 0152 0978 ldrb r1, [r1] @ tmp344,
> 659 0154 0902 lsls r1, r1, #8 @ tmp345, tmp344,
> 660 0156 3143 orrs r1, r6 @ tmp346, tmp340
> 661 0158 2A26 movs r6, #42 @ tmp349,
> 662 015a B446 mov ip, r6 @ tmp349, tmp349
> 663 015c A444 add ip, ip, r4 @ tmp349, hspi
> 664 015e 6646 mov r6, ip @ tmp349, tmp349
> 665 0160 3678 ldrb r6, [r6] @ tmp350,
> 666 0162 3604 lsls r6, r6, #16 @ tmp351, tmp350,
> 667 0164 3143 orrs r1, r6 @ tmp352, tmp351
> 668 0166 2B26 movs r6, #43 @ tmp355,
> 669 0168 B446 mov ip, r6 @ tmp355, tmp355
> 670 016a A444 add ip, ip, r4 @ tmp355, hspi
> 671 016c 6646 mov r6, ip @ tmp355, tmp355
> 672 016e 3678 ldrb r6, [r6] @ tmp356,
> 673 0170 3606 lsls r6, r6, #24 @ tmp357, tmp356,
> 674 0172 3143 orrs r1, r6 @ D.8647, tmp357
> 675 0174 0F43 orrs r7, r1 @ D.8647, D.8647
> 676 0176 617E ldrb r1, [r4, #25] @ tmp362,
> 677 0178 0902 lsls r1, r1, #8 @ tmp363, tmp362,
> 678 017a 8C46 mov ip, r1 @ tmp363, tmp363
> 679 017c 8021 movs r1, #128 @ tmp372,
> 680 017e 6646 mov r6, ip @ tmp363, tmp363
> 681 0180 8900 lsls r1, r1, #2 @ tmp372, tmp372,
> 682 0182 3140 ands r1, r6 @ D.8647, tmp363
> 683 0184 3943 orrs r1, r7 @ D.8647, D.8647
> 684 0186 0F00 movs r7, r1 @ tmp373, D.8647
> 685 0188 1740 ands r7, r2 @ tmp373, tmp195
> 686 018a 1E78 ldrb r6, [r3] @ _14->CR1, _14->CR1
> 687 018c 1F70 *strb r7, [r3] @ tmp373, _14->CR1*
> 688 018e 0F0A lsrs r7, r1, #8 @ tmp383, D.8647,
> 689 0190 1740 ands r7, r2 @ tmp384, tmp195
> 690 0192 5E78 ldrb r6, [r3, #1] @ _14->CR1, _14->CR1
> 691 0194 5F70 *strb r7, [r3, #1] @ tmp384, _14->CR1*
> 692 0196 0F0C lsrs r7, r1, #16 @ tmp394, D.8647,
> 693 0198 1740 ands r7, r2 @ tmp395, tmp195
> 694 019a 9E78 ldrb r6, [r3, #2] @ _14->CR1, _14->CR1
> 695 019c 090E lsrs r1, r1, #24 @ tmp405, D.8647,
> 696 019e 9F70 *strb r7, [r3, #2] @ tmp395, _14->CR1*
> 697 01a0 DF78 ldrb r7, [r3, #3] @ _14->CR1, _14->CR1
> 698 01a2 D970 *strb r1, [r3, #3] @ tmp405, _14->CR1*
>
>
> Toto jsou parametry prekladu:
>
> arm-none-eabi-gcc -c -mthumb -mcpu=cortex-m0plus -I. -g3
> -DUSE_HAL_DRIVER -DSTM32L052xx -D__HEAP_SIZE=0x0000
> -D__STACK_SIZE=0x0600 -mfloat-abi=soft -funsigned-char -fpack-struct
> -fno-strict-aliasing -mno-unaligned-access -fdata-sections
> -ffunction-sections -fverbose-asm -Wall -Wno-pointer-sign
> -Wno-discarded-qualifiers
> -Wa,-adhln=../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.lst
> -I../src -I../libs/STM32L0xx_HAL_Driver/Inc
> -I../libs/STM32L0xx_HAL_Driver/Inc/Legacy
> -I../libs/STM32_USB_Device_Library/Core/Inc
> -I../libs/STM32_USB_Device_Library/Class/CDC/Inc
> -I../libs/CMSIS/Device/ST/STM32L0xx/Include
> -I../libs/CMSIS/Include -std=gnu99 -MMD -MP -MF
> .dep/stm32l0xx_hal_spi.o.d -Os
> ../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c -o
> ../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
>
>
>
> J.S.
>
>
> On 08/17/2018 11:51 AM, Jan Waclawek wrote:
>> aha a aj command line ktorym to prekladata
>>
>> ----- Original Message ---------------
>>
>>> Este som take nevidel.
>>>
>>> Ukazte disasm (spolu so zdrojom).
>>>
>>> wek
>>>
>>>
>>> ----- Original Message ---------------
>>>> Zdravim,
>>>>
>>>> resim problem s pristupem do periferii na STM32L0. Periferie (SPI) umoznuje
>>>> pouze 32-bit pristup, avsak GCC zapis rozlozi na nekolik 8-bit pristupu.
>>>> Testovano na vicero verzich GCC.
>>>> Jak se nadefinuje pouziti jen 32-bit pristupu? Co jsem dohledal, tak by snad
>>>> melo stacit nadefinoval registr jako volatile uint32_t. Takto nadefinovan je,
>>>> ale pouze jako soucast slozitejsi struktury. Musi byt tedy cela struktura byt
>>>> jako volatile, staci aby pouze dane polozky byly volatile, nebo je to bug v GCC?
>>>>
>>>>
>>>> J.S.
>>>>
>>> _______________________________________________
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>
>
>
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