<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
</head>
<body text="#000000" bgcolor="#FFFFFF">
<div class="moz-cite-prefix">Mozna zacinam chapat, proc v tech
knihovnach pouzivaji vesmes pomocnou promennou, do ktere to
nejdriv vyskladaji...<br>
Jak donutit prekladac k zapisu vysledku nejakeho vyrazu najednou,
netusim. Mozna na to je nejaky attribut, ktery by se pouzil k
prvku struktury nebo na celou strukturu. Mozna je to i tim, ze
struktura nema attribut zarovnani na 4B. A take mne prekvapuje, ze
to tedy neresi to volatile, protoze prekladac nema predpokladat,
ze tam bude to, co tam minule zapsal...<br>
<br>
Dne 17.08.2018 v 12:30 Jan Smrz napsal(a):<br>
</div>
<blockquote type="cite"
cite="mid:53a825fb-fbc8-e1dc-754b-eca88ab449b6@email.cz">
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<div class="moz-cite-prefix">Jedna se o cast HAL knihovny
(stm32l0xx_hal_spi.c).<br>
<br>
Relevantni casti:<br>
<tt><br>
</tt><tt>#define __IO volatile /*!<
Defines 'read / write' permissions */</tt><tt><br>
</tt><tt><br>
</tt><tt>typedef struct</tt><tt><br>
</tt><tt>{</tt><tt><br>
</tt><tt> __IO uint32_t CR1; /*!< SPI Control register
1 (not used in I2S mode), Address offset: 0x00 */</tt><tt><br>
</tt><tt> __IO uint32_t CR2; /*!< SPI Control register
2, Address offset: 0x04 */</tt><tt><br>
</tt><tt> __IO uint32_t SR; /*!< SPI Status
register, Address offset: 0x08
*/</tt><tt><br>
</tt><tt> __IO uint32_t DR; /*!< SPI data
register, Address offset:
0x0C */</tt><tt><br>
</tt><tt> __IO uint32_t CRCPR; /*!< SPI CRC polynomial
register (not used in I2S mode), Address offset: 0x10 */</tt><tt><br>
</tt><tt> __IO uint32_t RXCRCR; /*!< SPI Rx CRC register
(not used in I2S mode), Address offset: 0x14 */</tt><tt><br>
</tt><tt> __IO uint32_t TXCRCR; /*!< SPI Tx CRC register
(not used in I2S mode), Address offset: 0x18 */</tt><tt><br>
</tt><tt> __IO uint32_t I2SCFGR; /*!< SPI_I2S configuration
register, Address offset: 0x1C */</tt><tt><br>
</tt><tt> __IO uint32_t I2SPR; /*!< SPI_I2S prescaler
register, Address offset: 0x20 */</tt><tt><br>
</tt><tt>} SPI_TypeDef;</tt><tt><br>
</tt><tt><br>
</tt><tt><br>
</tt><tt>typedef struct __SPI_HandleTypeDef</tt><tt><br>
</tt><tt>{</tt><tt><br>
</tt><tt> SPI_TypeDef *Instance; /*!< SPI
registers base address */</tt><tt><br>
</tt><tt> SPI_InitTypeDef Init; /*!< SPI
communication parameters */</tt><tt><br>
</tt><tt> uint8_t *pTxBuffPtr; /*!<
Pointer to SPI Tx transfer Buffer */</tt><tt><br>
</tt><tt> uint16_t TxXferSize; /*!< SPI
Tx transfer size */</tt><tt><br>
</tt><tt> __IO uint16_t TxXferCount; /*!< SPI
Tx Transfer Counter */</tt><tt><br>
</tt><tt> uint8_t *pRxBuffPtr; /*!<
Pointer to SPI Rx transfer Buffer */</tt><tt><br>
</tt><tt> uint16_t RxXferSize; /*!< SPI
Rx transfer size */</tt><tt><br>
</tt><tt> __IO uint16_t RxXferCount; /*!< SPI
Rx Transfer Counter */</tt><tt><br>
</tt><tt> DMA_HandleTypeDef *hdmatx; /*!< SPI
Tx DMA handle parameters */</tt><tt><br>
</tt><tt> DMA_HandleTypeDef *hdmarx; /*!< SPI
Rx DMA handle parameters */</tt><tt><br>
</tt><tt> void (*RxISR)(struct
__SPI_HandleTypeDef * hspi); /*!< function pointer on Rx
ISR */</tt><tt><br>
</tt><tt> void (*TxISR)(struct
__SPI_HandleTypeDef * hspi); /*!< function pointer on Tx
ISR */</tt><tt><br>
</tt><tt> HAL_LockTypeDef Lock; /*!< SPI
locking object */</tt><tt><br>
</tt><tt> __IO HAL_SPI_StateTypeDef State; /*!< SPI
communication state */</tt><tt><br>
</tt><tt> __IO uint32_t ErrorCode; /*!< SPI
Error code */</tt><tt><br>
</tt><tt>}SPI_HandleTypeDef;</tt><tt><br>
</tt><tt><br>
</tt><tt><br>
</tt><tt>#define WRITE_REG(REG, VAL) ((REG) = (VAL))</tt><tt><br>
</tt><tt><br>
<br>
</tt><tt>HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)</tt><tt><br>
</tt><tt>{</tt><tt><br>
</tt><tt>....</tt><tt><br>
</tt><tt> WRITE_REG(hspi->Instance->CR1,
(hspi->Init.Mode | hspi->Init.Direction |
hspi->Init.DataSize |</tt><tt><br>
</tt><tt>
hspi->Init.CLKPolarity | hspi->Init.CLKPhase |
(hspi->Init.NSS & SPI_CR1_SSM) |</tt><tt><br>
</tt><tt>
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit |
hspi->Init.CRCCalculation) );</tt><tt><br>
...<br>
</tt><tt>}</tt><br>
<br>
<br>
Makro WRITE_REG se prelozi takto:<br>
<br>
<br>
<tt>277:../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c
****
hspi->Init.CLKPolarity | hspi->Init.CLKPhase |
(hspi->Init.NSS & </tt><tt><br>
</tt><tt> 547 .loc 1 277 0</tt><tt><br>
</tt><tt> 548 007a 6178 ldrb r1, [r4, #1] @
*hspi_4(D), *hspi_4(D)</tt><tt><br>
</tt><tt> 549 007c 2778 ldrb r7, [r4] @
*hspi_4(D), *hspi_4(D)</tt><tt><br>
</tt><tt> 550 007e A378 ldrb r3, [r4, #2] @
*hspi_4(D), *hspi_4(D)</tt><tt><br>
</tt><tt> 551 0080 0902 lsls r1, r1, #8 @
tmp237, *hspi_4(D),</tt><tt><br>
</tt><tt> 552 0082 3943 orrs r1, r7 @ tmp237,
*hspi_4(D)</tt><tt><br>
</tt><tt> 553 0084 1B04 lsls r3, r3, #16 @
tmp240, *hspi_4(D),</tt><tt><br>
</tt><tt> 554 0086 0B43 orrs r3, r1 @ tmp240,
tmp238</tt><tt><br>
</tt><tt> 555 0088 1900 movs r1, r3 @ tmp241,
tmp240</tt><tt><br>
</tt><tt> 556 008a 6679 ldrb r6, [r4, #5] @
tmp247,</tt><tt><br>
</tt><tt> 557 008c E378 ldrb r3, [r4, #3] @
*hspi_4(D), *hspi_4(D)</tt><tt><br>
</tt><tt> 558 008e 3602 lsls r6, r6, #8 @
tmp248, tmp247,</tt><tt><br>
</tt><tt> 559 0090 1B06 lsls r3, r3, #24 @
tmp243, *hspi_4(D),</tt><tt><br>
</tt><tt> 560 0092 0B43 orrs r3, r1 @ tmp244,
tmp241</tt><tt><br>
</tt><tt> 561 0094 3100 movs r1, r6 @ tmp248,
tmp248</tt><tt><br>
</tt><tt> 562 0096 2779 ldrb r7, [r4, #4] @
tmp246,</tt><tt><br>
</tt><tt> 272:../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c
**** </tt><tt><br>
</tt><tt> 563 .loc 1 272 0</tt><tt><br>
</tt><tt> 564 0098 0020 movs r0, #0 @ tmp199,</tt><tt><br>
</tt><tt> 277:../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c
****
hspi->Init.CLKPolarity | hspi->Init.CLKPhase |
(hspi->Init.NSS & </tt><tt><br>
</tt><tt> 565 .loc 1 277 0</tt><tt><br>
</tt><tt> 566 009a 3943 orrs r1, r7 @ tmp248,
tmp246</tt><tt><br>
</tt><tt> 567 009c A779 ldrb r7, [r4, #6] @
tmp250,</tt><tt><br>
</tt><tt> 568 009e 3F04 lsls r7, r7, #16 @
tmp251, tmp250,</tt><tt><br>
</tt><tt> 569 00a0 3E00 movs r6, r7 @ tmp251,
tmp251</tt><tt><br>
</tt><tt> 570 00a2 E779 ldrb r7, [r4, #7] @
tmp253,</tt><tt><br>
</tt><tt> 571 00a4 0E43 orrs r6, r1 @ tmp251,
tmp249</tt><tt><br>
</tt><tt> 572 00a6 3F06 lsls r7, r7, #24 @
tmp254, tmp253,</tt><tt><br>
</tt><tt> 573 00a8 3743 orrs r7, r6 @ D.8647,
tmp252</tt><tt><br>
</tt><tt> 574 00aa 667A ldrb r6, [r4, #9] @
tmp258,</tt><tt><br>
</tt><tt> 575 00ac 217A ldrb r1, [r4, #8] @
tmp257,</tt><tt><br>
</tt><tt> 576 00ae 3602 lsls r6, r6, #8 @
tmp259, tmp258,</tt><tt><br>
</tt><tt> 577 00b0 0E43 orrs r6, r1 @ tmp260,
tmp257</tt><tt><br>
</tt><tt> 578 00b2 A17A ldrb r1, [r4, #10] @
tmp261,</tt><tt><br>
</tt><tt> 579 00b4 0904 lsls r1, r1, #16 @
tmp262, tmp261,</tt><tt><br>
</tt><tt> 580 00b6 0E43 orrs r6, r1 @ tmp263,
tmp262</tt><tt><br>
</tt><tt> 581 00b8 E17A ldrb r1, [r4, #11] @
tmp264,</tt><tt><br>
</tt><tt> 582 00ba 0906 lsls r1, r1, #24 @
tmp265, tmp264,</tt><tt><br>
</tt><tt> 583 00bc 3143 orrs r1, r6 @ D.8647,
tmp263</tt><tt><br>
</tt><tt> 584 00be 667B ldrb r6, [r4, #13] @
tmp270,</tt><tt><br>
</tt><tt> 585 00c0 3943 orrs r1, r7 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 586 00c2 277B ldrb r7, [r4, #12] @
tmp269,</tt><tt><br>
</tt><tt> 587 00c4 3602 lsls r6, r6, #8 @
tmp271, tmp270,</tt><tt><br>
</tt><tt> 588 00c6 3E43 orrs r6, r7 @ tmp272,
tmp269</tt><tt><br>
</tt><tt> 589 00c8 A77B ldrb r7, [r4, #14] @
tmp273,</tt><tt><br>
</tt><tt> 590 00ca 3F04 lsls r7, r7, #16 @
tmp274, tmp273,</tt><tt><br>
</tt><tt> 591 00cc 3743 orrs r7, r6 @ tmp275,
tmp272</tt><tt><br>
</tt><tt> 592 00ce E67B ldrb r6, [r4, #15] @
tmp276,</tt><tt><br>
</tt><tt> 593 00d0 3606 lsls r6, r6, #24 @
tmp277, tmp276,</tt><tt><br>
</tt><tt> 594 00d2 3E43 orrs r6, r7 @ D.8647,
tmp275</tt><tt><br>
</tt><tt> 595 00d4 3143 orrs r1, r6 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 596 00d6 0F00 movs r7, r1 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 597 00d8 617C ldrb r1, [r4, #17] @
tmp282,</tt><tt><br>
</tt><tt> 598 00da 267C ldrb r6, [r4, #16] @
tmp281,</tt><tt><br>
</tt><tt> 599 00dc 0902 lsls r1, r1, #8 @
tmp283, tmp282,</tt><tt><br>
</tt><tt> 600 00de 3143 orrs r1, r6 @ tmp284,
tmp281</tt><tt><br>
</tt><tt> 601 00e0 A67C ldrb r6, [r4, #18] @
tmp285,</tt><tt><br>
</tt><tt> 602 00e2 3604 lsls r6, r6, #16 @
tmp286, tmp285,</tt><tt><br>
</tt><tt> 603 00e4 3143 orrs r1, r6 @ tmp287,
tmp286</tt><tt><br>
</tt><tt> 604 00e6 E67C ldrb r6, [r4, #19] @
tmp288,</tt><tt><br>
</tt><tt> 605 00e8 3606 lsls r6, r6, #24 @
tmp289, tmp288,</tt><tt><br>
</tt><tt> 606 00ea 0E43 orrs r6, r1 @ D.8647,
tmp287</tt><tt><br>
</tt><tt> 607 00ec 3E43 orrs r6, r7 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 608 00ee 677D ldrb r7, [r4, #21] @
tmp294,</tt><tt><br>
</tt><tt> 609 00f0 217D ldrb r1, [r4, #20] @
tmp293,</tt><tt><br>
</tt><tt> 610 00f2 3F02 lsls r7, r7, #8 @
tmp295, tmp294,</tt><tt><br>
</tt><tt> 611 00f4 0F43 orrs r7, r1 @ tmp296,
tmp293</tt><tt><br>
</tt><tt> 612 00f6 A17D ldrb r1, [r4, #22] @
tmp297,</tt><tt><br>
</tt><tt> 613 00f8 0904 lsls r1, r1, #16 @
tmp298, tmp297,</tt><tt><br>
</tt><tt> 614 00fa 0F43 orrs r7, r1 @ tmp299,
tmp298</tt><tt><br>
</tt><tt> 615 00fc E17D ldrb r1, [r4, #23] @
tmp300,</tt><tt><br>
</tt><tt> 616 00fe 0906 lsls r1, r1, #24 @
tmp301, tmp300,</tt><tt><br>
</tt><tt> 617 0100 3943 orrs r1, r7 @ D.8647,
tmp299</tt><tt><br>
</tt><tt> 618 0102 0E43 orrs r6, r1 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 619 0104 B446 mov ip, r6 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 620 0106 667F ldrb r6, [r4, #29] @
tmp306,</tt><tt><br>
</tt><tt> 621 0108 217F ldrb r1, [r4, #28] @
tmp305,</tt><tt><br>
</tt><tt> 622 010a 3602 lsls r6, r6, #8 @
tmp307, tmp306,</tt><tt><br>
</tt><tt> 623 010c 0E43 orrs r6, r1 @ tmp307,
tmp305</tt><tt><br>
</tt><tt> 624 010e A17F ldrb r1, [r4, #30] @
tmp309,</tt><tt><br>
</tt><tt> 625 0110 0904 lsls r1, r1, #16 @
tmp310, tmp309,</tt><tt><br>
</tt><tt> 626 0112 3143 orrs r1, r6 @ tmp310,
tmp308</tt><tt><br>
</tt><tt> 627 0114 0E00 movs r6, r1 @ tmp311,
tmp310</tt><tt><br>
</tt><tt> 628 0116 E17F ldrb r1, [r4, #31] @
tmp312,</tt><tt><br>
</tt><tt> 629 0118 0906 lsls r1, r1, #24 @
tmp313, tmp312,</tt><tt><br>
</tt><tt> 630 011a 3143 orrs r1, r6 @ D.8647,
tmp311</tt><tt><br>
</tt><tt> 631 011c 6646 mov r6, ip @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 632 011e 3143 orrs r1, r6 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 633 0120 661C adds r6, r4, #1 @
tmp318, hspi,</tt><tt><br>
</tt><tt> 634 0122 F77F ldrb r7, [r6, #31] @
tmp319,</tt><tt><br>
</tt><tt> 635 0124 A61C adds r6, r4, #2 @
tmp320, hspi,</tt><tt><br>
</tt><tt> 636 0126 F67F ldrb r6, [r6, #31] @
tmp321,</tt><tt><br>
</tt><tt> 637 0128 3602 lsls r6, r6, #8 @
tmp322, tmp321,</tt><tt><br>
</tt><tt> 638 012a 3E43 orrs r6, r7 @ tmp323,
tmp319</tt><tt><br>
</tt><tt> 639 012c E71C adds r7, r4, #3 @
tmp324, hspi,</tt><tt><br>
</tt><tt> 640 012e FF7F ldrb r7, [r7, #31] @
tmp325,</tt><tt><br>
</tt><tt> 641 0130 3F04 lsls r7, r7, #16 @
tmp326, tmp325,</tt><tt><br>
</tt><tt> 642 0132 3E43 orrs r6, r7 @ tmp327,
tmp326</tt><tt><br>
</tt><tt> 643 0134 271D adds r7, r4, #4 @
tmp328, hspi,</tt><tt><br>
</tt><tt> 644 0136 FF7F ldrb r7, [r7, #31] @
tmp329,</tt><tt><br>
</tt><tt> 645 0138 3F06 lsls r7, r7, #24 @
tmp330, tmp329,</tt><tt><br>
</tt><tt> 646 013a 3743 orrs r7, r6 @ D.8647,
tmp327</tt><tt><br>
</tt><tt> 647 013c 2600 movs r6, r4 @ tmp337,
hspi</tt><tt><br>
</tt><tt> 648 013e 0F43 orrs r7, r1 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 649 0140 2100 movs r1, r4 @ tmp339,
hspi</tt><tt><br>
</tt><tt> 650 0142 0836 adds r6, r6, #8 @
tmp337,</tt><tt><br>
</tt><tt> 651 0144 0196 str r6, [sp, #4] @
tmp337, %sfp</tt><tt><br>
</tt><tt> 652 0146 2831 adds r1, r1, #40 @
tmp339,</tt><tt><br>
</tt><tt> 653 0148 0978 ldrb r1, [r1] @
tmp340,</tt><tt><br>
</tt><tt> 654 014a 8C46 mov ip, r1 @ tmp340,
tmp340</tt><tt><br>
</tt><tt> 655 014c 2100 movs r1, r4 @ tmp343,
hspi</tt><tt><br>
</tt><tt> 656 014e 6646 mov r6, ip @ tmp340,
tmp340</tt><tt><br>
</tt><tt> 657 0150 2931 adds r1, r1, #41 @
tmp343,</tt><tt><br>
</tt><tt> 658 0152 0978 ldrb r1, [r1] @
tmp344,</tt><tt><br>
</tt><tt> 659 0154 0902 lsls r1, r1, #8 @
tmp345, tmp344,</tt><tt><br>
</tt><tt> 660 0156 3143 orrs r1, r6 @ tmp346,
tmp340</tt><tt><br>
</tt><tt> 661 0158 2A26 movs r6, #42 @ tmp349,</tt><tt><br>
</tt><tt> 662 015a B446 mov ip, r6 @ tmp349,
tmp349</tt><tt><br>
</tt><tt> 663 015c A444 add ip, ip, r4 @
tmp349, hspi</tt><tt><br>
</tt><tt> 664 015e 6646 mov r6, ip @ tmp349,
tmp349</tt><tt><br>
</tt><tt> 665 0160 3678 ldrb r6, [r6] @
tmp350,</tt><tt><br>
</tt><tt> 666 0162 3604 lsls r6, r6, #16 @
tmp351, tmp350,</tt><tt><br>
</tt><tt> 667 0164 3143 orrs r1, r6 @ tmp352,
tmp351</tt><tt><br>
</tt><tt> 668 0166 2B26 movs r6, #43 @ tmp355,</tt><tt><br>
</tt><tt> 669 0168 B446 mov ip, r6 @ tmp355,
tmp355</tt><tt><br>
</tt><tt> 670 016a A444 add ip, ip, r4 @
tmp355, hspi</tt><tt><br>
</tt><tt> 671 016c 6646 mov r6, ip @ tmp355,
tmp355</tt><tt><br>
</tt><tt> 672 016e 3678 ldrb r6, [r6] @
tmp356,</tt><tt><br>
</tt><tt> 673 0170 3606 lsls r6, r6, #24 @
tmp357, tmp356,</tt><tt><br>
</tt><tt> 674 0172 3143 orrs r1, r6 @ D.8647,
tmp357</tt><tt><br>
</tt><tt> 675 0174 0F43 orrs r7, r1 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 676 0176 617E ldrb r1, [r4, #25] @
tmp362,</tt><tt><br>
</tt><tt> 677 0178 0902 lsls r1, r1, #8 @
tmp363, tmp362,</tt><tt><br>
</tt><tt> 678 017a 8C46 mov ip, r1 @ tmp363,
tmp363</tt><tt><br>
</tt><tt> 679 017c 8021 movs r1, #128 @
tmp372,</tt><tt><br>
</tt><tt> 680 017e 6646 mov r6, ip @ tmp363,
tmp363</tt><tt><br>
</tt><tt> 681 0180 8900 lsls r1, r1, #2 @
tmp372, tmp372,</tt><tt><br>
</tt><tt> 682 0182 3140 ands r1, r6 @ D.8647,
tmp363</tt><tt><br>
</tt><tt> 683 0184 3943 orrs r1, r7 @ D.8647,
D.8647</tt><tt><br>
</tt><tt> 684 0186 0F00 movs r7, r1 @ tmp373,
D.8647</tt><tt><br>
</tt><tt> 685 0188 1740 ands r7, r2 @ tmp373,
tmp195</tt><tt><br>
</tt><tt> 686 018a 1E78 ldrb r6, [r3] @
_14->CR1, _14->CR1</tt><tt><br>
</tt><tt> 687 018c 1F70 <b>strb r7, [r3] @
tmp373, _14->CR1</b></tt><tt><br>
</tt><tt> 688 018e 0F0A lsrs r7, r1, #8 @
tmp383, D.8647,</tt><tt><br>
</tt><tt> 689 0190 1740 ands r7, r2 @ tmp384,
tmp195</tt><tt><br>
</tt><tt> 690 0192 5E78 ldrb r6, [r3, #1] @
_14->CR1, _14->CR1</tt><tt><br>
</tt><tt> 691 0194 5F70 <b>strb r7, [r3, #1]
@ tmp384, _14->CR1</b></tt><tt><br>
</tt><tt> 692 0196 0F0C lsrs r7, r1, #16 @
tmp394, D.8647,</tt><tt><br>
</tt><tt> 693 0198 1740 ands r7, r2 @ tmp395,
tmp195</tt><tt><br>
</tt><tt> 694 019a 9E78 ldrb r6, [r3, #2] @
_14->CR1, _14->CR1</tt><tt><br>
</tt><tt> 695 019c 090E lsrs r1, r1, #24 @
tmp405, D.8647,</tt><tt><br>
</tt><tt> 696 019e 9F70 <b>strb r7, [r3, #2]
@ tmp395, _14->CR1</b></tt><tt><br>
</tt><tt> 697 01a0 DF78 ldrb r7, [r3, #3] @
_14->CR1, _14->CR1</tt><tt><br>
</tt><tt> 698 01a2 D970 <b>strb r1, [r3, #3]
@ tmp405, _14->CR1</b></tt><br>
<br>
<br>
Toto jsou parametry prekladu:<br>
<br>
<tt>arm-none-eabi-gcc -c -mthumb -mcpu=cortex-m0plus -I. -g3
-DUSE_HAL_DRIVER -DSTM32L052xx -D__HEAP_SIZE=0x0000
-D__STACK_SIZE=0x0600 -mfloat-abi=soft -funsigned-char
-fpack-struct -fno-strict-aliasing -mno-unaligned-access
-fdata-sections -ffunction-sections -fverbose-asm -Wall
-Wno-pointer-sign -Wno-discarded-qualifiers
-Wa,-adhln=../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.lst
-I../src -I../libs/STM32L0xx_HAL_Driver/Inc
-I../libs/STM32L0xx_HAL_Driver/Inc/Legacy
-I../libs/STM32_USB_Device_Library/Core/Inc
-I../libs/STM32_USB_Device_Library/Class/CDC/Inc
-I../libs/CMSIS/Device/ST/STM32L0xx/Include
-I../libs/CMSIS/Include -std=gnu99 -MMD -MP -MF
.dep/stm32l0xx_hal_spi.o.d -Os
../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.c -o
../libs/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o</tt><tt><br>
</tt><tt><br>
</tt><br>
<br>
J.S.<br>
<br>
<br>
On 08/17/2018 11:51 AM, Jan Waclawek wrote:<br>
</div>
<blockquote type="cite"
cite="mid:PC1952018081711512608749719bb44@wekPC">
<pre wrap="">aha a aj command line ktorym to prekladata
----- Original Message ---------------
</pre>
<blockquote type="cite">
<pre wrap="">Este som take nevidel.
Ukazte disasm (spolu so zdrojom).
wek
----- Original Message ---------------
</pre>
<blockquote type="cite">
<pre wrap="">Zdravim,
resim problem s pristupem do periferii na STM32L0. Periferie (SPI) umoznuje
pouze 32-bit pristup, avsak GCC zapis rozlozi na nekolik 8-bit pristupu.
Testovano na vicero verzich GCC.
Jak se nadefinuje pouziti jen 32-bit pristupu? Co jsem dohledal, tak by snad
melo stacit nadefinoval registr jako volatile uint32_t. Takto nadefinovan je,
ale pouze jako soucast slozitejsi struktury. Musi byt tedy cela struktura byt
jako volatile, staci aby pouze dane polozky byly volatile, nebo je to bug v GCC?
J.S.
</pre>
</blockquote>
<pre wrap="">_______________________________________________
HW-list mailing list - sponsored by <a class="moz-txt-link-abbreviated" href="http://www.HW.cz" moz-do-not-send="true">www.HW.cz</a>
<a class="moz-txt-link-abbreviated" href="mailto:Hw-list@list.hw.cz" moz-do-not-send="true">Hw-list@list.hw.cz</a>
<a class="moz-txt-link-freetext" href="http://list.hw.cz/mailman/listinfo/hw-list" moz-do-not-send="true">http://list.hw.cz/mailman/listinfo/hw-list</a>
</pre>
</blockquote>
<pre wrap="">_______________________________________________
HW-list mailing list - sponsored by <a class="moz-txt-link-abbreviated" href="http://www.HW.cz" moz-do-not-send="true">www.HW.cz</a>
<a class="moz-txt-link-abbreviated" href="mailto:Hw-list@list.hw.cz" moz-do-not-send="true">Hw-list@list.hw.cz</a>
<a class="moz-txt-link-freetext" href="http://list.hw.cz/mailman/listinfo/hw-list" moz-do-not-send="true">http://list.hw.cz/mailman/listinfo/hw-list</a>
</pre>
</blockquote>
<br>
<br>
<fieldset class="mimeAttachmentHeader"></fieldset>
<br>
<pre wrap="">_______________________________________________
HW-list mailing list - sponsored by <a class="moz-txt-link-abbreviated" href="http://www.HW.cz">www.HW.cz</a>
<a class="moz-txt-link-abbreviated" href="mailto:Hw-list@list.hw.cz">Hw-list@list.hw.cz</a>
<a class="moz-txt-link-freetext" href="http://list.hw.cz/mailman/listinfo/hw-list">http://list.hw.cz/mailman/listinfo/hw-list</a>
</pre>
</blockquote>
<p><br>
</p>
</body>
</html>