Cortex M4, FPU a ISR

Milan B. milan na bastl.sk
Pondělí Leden 23 00:11:44 CET 2017


On 22.01.2017 23:15, Jaroslav Buchta wrote:
> Nejak nechapu, kdy se ukladaji nebo neukladaji registry na zasobnik, 
> to procesor nejak automaticky detekuje?

Kuk sem: 
http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf 
a hladat  FPCA a DISFPCA, pripadne  LSPEN a LSPACT, to tomu vie dodat 
trochu stavy.



> Zatim jsem vypozoroval, ze v zavislosti na tom, jestli v hlavnim 
> programu nepouziju/pouziju FP aritmetiku (v ISR je vzdy) tak je v LR 
> hodnota 0xFFFFFFFD/0xFFFFFFED (Return to Thread mode, exception return 
> uses non-floating-point state
> from the PSP and execution uses PSP after return./Return to Thread 
> mode, exception return uses floating-point state from PSP and 
> execution uses PSP after return.)
> Co me mate trosku vic je, ze latence ISR je v obou pripadech cca 350 
> ns (AHB 72MHz)  Jednak mi to prijde trosku moc a pak bych cekal, ze 
> tady bude docela rozdil...
> Je to tak normalni nebo je nekde chyba?
>
> Tetsuju na tomto kodu:
> volatile float fff = 1;
>
> void TIM4_IRQHandler()
> {
>     GPIOE->BSRR = GPIO_Pin_8;
>     TIM4->SR = (uint16_t)~TIM_IT_CC1;
>     fff = fff * 1.01F;
>     if (fff > 10.0F) fff = 1.0F;
>     GPIOE->BRR = GPIO_Pin_8;
> }
>
> v asm to vyjde:
> 08003558    push    {r7}
> 0800355A    add    r7, sp, #0
> (131)      GPIOE->BSRR = GPIO_Pin_8;
> 0800355C    ldr    r3, [pc, #80]    ; (0x80035b0 <TIM4_IRQHandler+88>)
> 0800355E    mov.w    r2, #256    ; 0x100
> 08003562    str    r2, [r3, #24]
> (136)      TIM4->SR = (uint16_t)~TIM_IT_CC1;
> 08003564    ldr    r3, [pc, #76]    ; (0x80035b4 <TIM4_IRQHandler+92>)
> 08003566    movw    r2, #65533    ; 0xfffd
> 0800356A    str    r2, [r3, #16]
> (137)      fff = fff * 1.01F;
> 0800356C    ldr    r3, [pc, #72]    ; (0x80035b8 <TIM4_IRQHandler+96>)
> 0800356E    vldr    s15, [r3]
> 08003572    vldr    s14, [pc, #72]    ; 0x80035bc <TIM4_IRQHandler+100>
> 08003576    vmul.f32    s15, s15, s14
> 0800357A    ldr    r3, [pc, #60]    ; (0x80035b8 <TIM4_IRQHandler+96>)
> 0800357C    vstr    s15, [r3]
> (138)      if (fff > 10.0F) fff = 1.0F;
> 08003580    ldr    r3, [pc, #52]    ; (0x80035b8 <TIM4_IRQHandler+96>)
> 08003582    vldr    s15, [r3]
> 08003586    vmov.f32    s14, #36    ; 0x24
> 0800358A    vcmpe.f32    s15, s14
> 0800358E    vmrs    APSR_nzcv, fpscr
> 08003592    ble.n    0x800359c <TIM4_IRQHandler+68>
> 08003594    ldr    r3, [pc, #32]    ; (0x80035b8 <TIM4_IRQHandler+96>)
> 08003596    mov.w    r2, #1065353216    ; 0x3f800000
> 0800359A    str    r2, [r3, #0]
> (139)
> (140)      GPIOE->BRR = GPIO_Pin_8;
> 0800359C    ldr    r3, [pc, #16]    ; (0x80035b0 <TIM4_IRQHandler+88>)
> 0800359E    mov.w    r2, #256    ; 0x100
> 080035A2    strh    r2, [r3, #40]    ; 0x28
> (141)  }
> 080035A4    nop
> 080035A6    mov    sp, r7
> 080035A8    ldr.w    r7, [sp], #4
> 080035AC    bx    lr
>
> A na osciloskopu stav v priloze: (zluta vystup PWM z TIM4, azurova PE8)
>
>
>
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