zpozdeni signalu

[Dee Jay]

Siemens LOGO ? 

----- Original Message ----- 
From: "pm" <konference@komfi.cz>
To: "HW-news" <hw-list@list.hw.cz>
Sent: Thursday, February 28, 2008 8:29 AM
Subject: zpozdeni signalu


DD,

    chanim nejaky bazmek, ktery by mel vstup ENABLE a CLK a lezl by z 
toho jeden OUTPUT

    jakmile bude ENABLE =1 pocita pulsy CLK a rekneme po x ( cca 50 
nastavitelne ) pulsech  nahodi OUTPUT
    jakmile bude ENABLE = 0 shodi OUTPUT

    vsechny signaly 24V
    pokud mozno koupit hotove

diky PM

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