VHDL - edge sensitive problem

[Jiri Beranek]

Dekuji vsem za napady. Toto funguje:

----------------------------------------------------------------
.
.
.
component BUFG
   port (
      I: IN std_logic;
      O: OUT std_logic);
end component;

component IBUF
   port (
      I: IN std_logic;
      O: OUT std_logic);
end component;
.
.
.
signal test_sig_Temp : std_logic;
signal test_sig_Int      : std_logic;
.
.
.
gclk_temp:       IBUF port map (I => test_sig, O => test_sig_Temp);
gclk_smc_we:  BUFG port map (I => test_sig_Temp, O => test_sig_Int);
.
.
.
process (test_sig_Int)
begin
 if (test_sig_Int'event and test_sig_Int='1')
  then
 test<='0';
 end if;
end process;

----------------------------------------------------------------

Mozna je to trosku krkolomne, ale funguje to.
Jestli ma jeste nekdo nejaky napad jak udelat jednoduseji nacteni nejake
hodnoty do latche na nabeznou hranu od
signalu test_sig ktery neni GCK, tak budu rad.

S pozdravem Jirka B.


----- Original Message ----- 
From: "Karel Radkovský" <karel.radkovsky@seznam.cz>
To: "HW-news" <hw-list@hw.cz>
Sent: Tuesday, July 12, 2005 10:27 AM
Subject: Re: VHDL - edge sensitive problem


Dobry den,

zkusil bych to takto:
ten signal zkuste pres primitivy IBUF a BUFG proroutovat na globalni hodiny,
viz
http://www.talkaboutprogramming.com/group/comp.lang.verilog/messages/26871.html

S pozdravem
-- 
Karel Radkovsky.

----- Original Message ----- 
From: "Jiri Beranek" <beranek@gost-elektronic.cz>
To: <hw-list@list.hw.cz>
Sent: Tuesday, July 12, 2005 4:09 AM
Subject: VHDL - edge sensitive problem


Zdravim, mam problem s timto:


process (test_sig)
begin
 if (test_sig'event and test_sig='1')
  then
 test<='0';
 end if;
end process;

test_sig je vstup namapovany na pin SPARTANA II, ktery neni GCK.
Hlasi mi to nasledujici chybu:


Illegal LOC on IPAD symbol "test_sig" or BUFGP symbol

test_sig_BUFGP" (output signal=test_sig_BUFGP), IPAD-IBUFG should only be
LOCed

to GCLKIOB site.



Kdyz test_sig namapuju na pin ktery je GCK, tak je to OK.

Otazka je: co mam napsat  nebo udelat, aby to chodilo i s ne GCK piny?



Dekuji Jirka B.



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