zase LCD z notasu

Jiri Drozd jirkonf@seznam.cz
Sobota Duben 16 18:19:41 CEST 2005


   Ted koukam na "VESA feature" konektor ktery tu mam na jedne grafice a 
to taky vypada dobre - viz pinout. Jenom mi neni jasne co znamena PB, 
PG,PR, PI, SB, SG, SR, SI... Napada me ze xR, xG, xB bude souviset s 
RGB, Sx a Px by mohlo byt neco jako vyssi a nizsi bit, ale co je xI? 
Intenzita? Kazdopadne z tohohle asi vytahnu jenom 8bpp, takze 256barev, 
ze? :o/


VESA Feature pinout:
	 Pin 	 Name 	 Description
  	 1 	 PD0 	 DAC Pixel Data Bit 0 (PB)
  	 2 	 PD1 	 DAC Pixel Data Bit 1 (PG)
  	 3 	 PD2 	 DAC Pixel Data Bit 2 (PR)
  	 4 	 PD3 	 DAC Pixel Data Bit 3 (PI)
  	 5 	 PD4 	 DAC Pixel Data Bit 4 (SB)
  	 6 	 PD5 	 DAC Pixel Data Bit 5 (SG)
  	 7 	 PD6 	 DAC Pixel Data Bit 6 (SR)
  	 8 	 PD7 	 DAC Pixel Data Bit 7 (SI)
  	 9 	 CLK 	 DAC Clock
  	 10 	 BLK 	 DAC Blanking
  	 11 	 HSYNC 	 Horizontal Sync
  	 12 	 VSYNC 	 Vertical Sync
  	 13 	 GND 	 Ground
  	 14 	 GND 	 Ground
  	 15 	 GND 	 Ground
  	 16 	 GND 	 Ground
  	 17 	 Select Internal Video - When high pins 1-8 are outputs, when 
low they are inputs. This pin has an internal pull-up
  	 18 	 Select Internal Sync - When high pins 10-12 are outputs. This 
pin has an internal pull-up
  	 19 	 Select Internal Dot Clock - When high pin 9 is an output. This 
pin has an internal pull-up
  	 20 	 n/c 	 Not used
  	 21 	 GND 	 Ground
  	 22 	 GND 	 Ground
  	 23 	 GND 	 Ground
  	 24 	 GND 	 Ground
  	 25 	 n/c 	 Not used
  	 26 	 n/c 	 Not used

JDrozd

Jiri Drozd napsal(a):
>    Tak ten pinout uz mam... Vypada to asi tak ze LCD ma (mimo jine) tyto 
> piny:
> 
> 8xR, 8xG, 8xB vstupy
> SHFCLK - Shift Clock. Pixel clock for flat panel data.
> FLM - First Line Marker. Flat Panel equivalent of VSYNC.
> LP - Latch Pulse. Flat Panel equivalent of HSYNC.
...



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