PIC 18F24J11 a DeepSleep
Ondřej Janovský
ondrej.janovsky na alarex.cz
Středa Říjen 22 09:55:20 CEST 2014
Zde je osekaná hrůza:
/**********************************************************************
* 2009 Microchip Technology Inc.
*
* FileName: deep_sleep.c
* Dependencies: Header (.h) files if applicable, see below
* Processor: PIC18F
* Compiler: MCC18 v3.30 or higher
*
* SOFTWARE LICENSE AGREEMENT:
* Microchip Technology Incorporated ("Microchip") retains all
* ownership and intellectual property rights in the code accompanying
* this message and in all derivatives hereto. You may use this code,
* and any derivatives created by any person or entity by or on your
* behalf, exclusively with Microchip's proprietary products. Your
* acceptance and/or use of this code constitutes agreement to the
* terms and conditions of this notice.
*
* CODE ACCOMPANYING THIS MESSAGE IS SUPPLIED BY MICROCHIP "AS IS". NO
* WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
* NOT LIMITED TO, IMPLIED WARRANTIES OF NON-INFRINGEMENT,
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS
* CODE, ITS INTERACTION WITH MICROCHIP'S PRODUCTS, COMBINATION WITH
* ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
*
* YOU ACKNOWLEDGE AND AGREE THAT, IN NO EVENT, SHALL MICROCHIP BE
* LIABLE, WHETHER IN CONTRACT, WARRANTY, TORT (INCLUDING NEGLIGENCE OR
* BREACH OF STATUTORY DUTY), STRICT LIABILITY, INDEMNITY,
* CONTRIBUTION, OR OTHERWISE, FOR ANY INDIRECT, SPECIAL, PUNITIVE,
* EXEMPLARY, INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, FOR COST OR
* EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE CODE, HOWSOEVER
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* MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THIS
* CODE, SHALL NOT EXCEED THE PRICE YOU PAID DIRECTLY TO MICROCHIP
* SPECIFICALLY TO HAVE THIS CODE DEVELOPED.
*
* You agree that you are solely responsible for testing the code and
* determining its suitability. Microchip has no obligation to modify,
* test, certify, or support the code.
*
* REVISION HISTORY:
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* Author Date Comments on this revision
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* Harsha.J.M 04/04/09 First release of source file
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
* ADDITIONAL NOTES:
* Code uses the Peripheral library support available with MCC18 Compiler
* Code Tested on:
* PIC18F46J50 controller
* The Processor starts with the External Crystal (8 Mhz).
*
*
* Hardware Implementation detalis
*
*----- Switch is connected to PORTA<3> pin which initiates sequence to
put the device into deep sleep upon switch pressing
*----- PORTB<0> is connected to LED used for source of inidication
*
* LED Indication Source of Wake up from deep sleep
*
* 1 blink ------------> Power on RESET
* 2 blinks ------------> MCLR (active low signal on
master Reset pin)
* 3 blinks ------------> RTCC (Real time clock
calender module)
* 4 blinks ------------> DSWDT (Deep Sleep watch dog
timer)
* 5 blinks ------------> Fault in configuring Deep Sleep
* 6 blinks ------------> Interrupt0 (INT0)
* 7 blinks ------------> Brown out reset (BOR)
* 8 blinks ------------> Ultra Low Power Wake UP (ULPWK)
*
**********************************************************************/
/****************************************************************
* To set CONFIG4 using the macro, the following line
* can be pasted only at the beginning source code,
* immediately below the '#include' directive.
*
** The following constants can be used to set CONFIG3L.
**
**
; DSWDT Clock Select:
; DSWDTOSC = T1OSCREF DSWDT uses T1OSC/T1CKI
; DSWDTOSC = INTOSCREF DSWDT uses INTRC
;
; RTCC Clock Select:
; RTCOSC = INTOSCREF RTCC uses INTRC
; RTCOSC = T1OSCREF RTCC uses T1OSC/T1CKI
;
; Deep Sleep BOR:
; DSBOREN = OFF Disabled
; DSBOREN = ON Enabled
;
; Deep Sleep Watchdog Timer:
; DSWDTEN = OFF Disabled
; DSWDTEN = ON Enabled
;
; Deep Sleep Watchdog Postscaler :
; DSWDTPS = 2 1:2 (2.1 ms)
; DSWDTPS = 8 1:8 (8.3 ms)
; DSWDTPS = 32 1:32 (33 ms)
; DSWDTPS = 128 1:128 (132 ms)
; DSWDTPS = 512 1:512 (528 ms)
; DSWDTPS = 2048 1:2,048 (2.1 seconds)
; DSWDTPS = 8192 1:8,192 (8.5 seconds)
; DSWDTPS = K32 1:32,768 (34 seconds)
; DSWDTPS = K131 1:131,072 (135 seconds)
; DSWDTPS = K524 1:524,288 (9 minutes)
; DSWDTPS = M2 1:2,097,152 (36 minutes)
; DSWDTPS = M8 1:8,388,608 (2.4 hours)
; DSWDTPS = M33 1:33,554,432 (9.6 hours)
; DSWDTPS = M134 1:134,217,728 (38.5 hours)
; DSWDTPS = M536 1:536,870,912 (6.4 days)
; DSWDTPS = G2 1:2,147,483,648 (25.7 days)
;
; T1OSCEN Enforcement:
; T1DIG = OFF Secondary Oscillator clock source may not be
selected
; T1DIG = ON Secondary Oscillator clock source may be selected
;
; Low-Power Timer1 Oscillator :
; LPT1OSC = ON Low-power operation
; LPT1OSC = OFF High-power operation
* Oscillator is configured as HS
* Fail safe monitor is enabled
* watch dog timer is disabled
* Extended instruction mode is disabled
* oscillator switch over is enabled
* CPU clock is not devided
*****************************************************************/
#define USE_OR_MASKS
#include "p18f24j11.h"
#include "dpslp.h"
#include "pps.h"
#define TRUE 1
//************Configuration in program*****************************
#if defined(__18F46J50) //If the selected device if PIC18F46J50,
then apply below settings else user will have to set
#pragma config DSWDTOSC = INTOSCREF, RTCOSC = INTOSCREF, DSBOREN = ON,
DSWDTEN = ON, DSWDTPS = 8192
#pragma config T1DIG = ON, LPT1OSC = OFF
#pragma config OSC=HS, FCMEN=ON, WDTEN=OFF, IESO=ON, XINST=OFF, CPUDIV=OSC1
#endif
// CONFIG1L
#pragma config WDTEN = OFF // Watchdog Timer (Disabled - Controlled
by SWDTEN bit)
#pragma config STVREN = ON // Stack Overflow/Underflow Reset (Enabled)
#pragma config XINST = OFF // Extended Instruction Set (Enabled)
// CONFIG1H
#pragma config CP0 = OFF // Code Protect (Program memory is not
code-protected)
// CONFIG2L
#pragma config OSC = INTOSC // Oscillator (INTOSCPLL)
#pragma config T1DIG = ON // T1OSCEN Enforcement (Secondary
Oscillator clock source may be selected)
#pragma config LPT1OSC = ON // Low-Power Timer1 Oscillator
(High-power operation)
#pragma config FCMEN = ON // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON // Internal External Oscillator Switch
Over Mode (Enabled)
// CONFIG2H
#pragma config WDTPS = 32768 // Watchdog Postscaler (1:32768)
// CONFIG3L
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT uses INTRC)
#pragma config RTCOSC = T1OSCREF// RTCC Clock Select (RTCC uses T1OSC/T1CKI)
#pragma config DSBOREN = ON // Deep Sleep BOR (Enabled)
#pragma config DSWDTEN = ON // Deep Sleep Watchdog Timer (Enabled)
#pragma config DSWDTPS = K32 // Deep Sleep Watchdog Postscaler
(1:2,147,483,648 (25.7 days))
// CONFIG3H
#pragma config IOL1WAY = ON // IOLOCK One-Way Set Enable bit (The
IOLOCK bit (PPSCON<0>) can be set once)
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit address
masking mode)
// CONFIG4L
#pragma config WPFP = PAGE_15 // Write/Erase Protect Page Start/End
Location (Write Protect Program Flash Page 15)
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region Select
(valid when WPDIS = 0) (Page WPFP<5:0> through Configuration Words
erase/write protected)
#pragma config WPCFG = OFF // Write/Erase Protect Configuration
Region (Configuration Words page not erase/write-protected)
// CONFIG4H
#pragma config WPDIS = OFF // Write Protect Disable bit
(WPFP<5:0>/WPEND region ignored)
//Function Prototypes
void user_main(void);
unsigned char GetKey(void);
void DebounceDelay(void);
void SwitchInit(void);
void Blink_LED(unsigned int number_of_blink);
void Blink_LED2(unsigned int number_of_blink);
void RTCC_configure(void);
void goSleep(void);
//Global structures used in deep sleep library
SRC ptr;
CONTEXT read_state;
//rtccTimeDate RtccTimeDate, RtccAlrmTimeDate, Rtcc_read_TimeDate;
void interrupt high_priority processHighInt(){
if (INTCONbits.INT0F==1) {
INTCONbits.INT0F = 0;
goSleep();
}
}
void goSleep(){
INTCONbits.INT0IF = 0;
NOP();
NOP();
INTCONbits.INT0IE = 1;
NOP();
NOP();
WDTCONbits.REGSLP = 1;
NOP();
NOP();
OSCCONbits.IDLEN = 0;
DSCONHbits.RTCWDIS = 1;
DSCONHbits.DSULPEN = 0;
DSCONLbits.ULPWDIS = 1;
DSCONLbits.DSBOR = 0;
NOP();
NOP();
while(1){
asm("bsf DSCONH, 7");
asm("nop");
asm("sleep");
}
}
void main(void) {
/*
OSCTUNEbits.INTSRC = 0; //prepnuti na 31kHz INTRC
OSCCONbits.IRCF = 0; //zapnuti frekvence na 31kHz
*/
ANCON1bits.PCFG12 = 1; //PORTB.RB0 je nastaven jako digitalni,
jinak nefunguje preruseni
TRISB = 0x01;
TRISC = 0x00;
TRISA = 0x00;
// Set up switch interrupt on INT0
//INTCON2bits.INTEDG0 = 0; // interrupt on falling edge of INT0
(switch pressed) RB0/INT0 - sestupna hrana
INTCON2bits.RBPU = 1;
//INTCONbits.INT0IF = 0; // ensure flag is cleared - priznak
preruseni je smazan
//INTCONbits.INT0IE = 1; // enable INT0 interrupt - je zapnuto
preruseni na RB0/INT0
// NOTE: INT0 is ALWAYS a high priority interrupt
// Set up global interrupts
RCONbits.IPEN = 1; // Enable priority levels on interrupts
INTCONbits.GIEL = 1; // Low priority interrupts disabled!!! -
Povoli/zakaze preruseni nizke urovne
INTCONbits.GIEH = 1; // Interrupting enabled. - Zapne vsechna preruseni
if (WDTCONbits.DS) //if this is the reset after the deep_sleep
wakup...then do this
{
DSCONLbits.RELEASE = 0;
DSWAKEH = 0; //priznaky priciny se musi vynulovat
DSWAKEL = 0;
} else //else... this is the Normal (pure) Power_on Reset...do the
normal init
{
}
goSleep();
while (1);
}
Dne 22.10.2014 v 09:30 Jaromir Sukuba napsal(a):
> Moja prvotna reakcia bola - neverim! :-)
> Tak ukazte minimalny kus kodu (menej nez 30 riadkov - teda nejaka
> elementarna inicializacia a hned vstup do sleep rezimu), ktorym
> demonstrujete ten velky odber.
>
> 2014-10-22 9:27 GMT+02:00 Ondřej Janovský <ondrej.janovsky na alarex.cz>:
>> Ani při TRISx jako výstupy se nic nemění :(
>>
>> Dne 22.10.2014 v 09:19 Jaromir Sukuba napsal(a):
>>
>> Kvizova otazka: co urobi digitalny vstup, ked plava vo vzduchu? ;-)
>> Skuste TRIS registre vynulovat (obsah prislusnych LAT registrov je
>> lahostajny, teda pokial na IO piny nie je nieco pripojene) a
>> pravdepodobne sa ta spotreba niekam pohne.
>>
>> 2014-10-22 9:15 GMT+02:00 Ondřej Janovský <ondrej.janovsky na alarex.cz>:
>>
>> TRISx mám nahozené jako vstupy a IDLEN bit nastavuji na 0 podle dokumentace.
>>
>> Dne 22.10.2014 v 09:11 Jaromir Sukuba napsal(a):
>>
>> A TRISx registre mate v akom stave? IO piny su niekam pripojene?
>> Je skutocne v sleep rezime? Co IDLEN bit?
>>
>> 2014-10-22 9:02 GMT+02:00 Ondřej Janovský <ondrej.janovsky na alarex.cz>:
>>
>> Ahoj,
>>
>> nenašel by se prosím někdo, kdo by mi pomohl vyřešit záhadu? Pic má mít při
>> režimu DeepSleep spotřebu v řádech uA nebo dokonce nA. Ale mě se po uspání
>> dostane maximálně na hranici 400uA a níže ani trochu.
>> Přitom na něm nejsou pověšené žádné periferie, do Sleep režimu chodí a z něj
>> vystupuje na WDtimer jak má. Jen prostě žere jak nezavřený.
>>
>> Oja
>>
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>>
>>
>> --
>> Ondřej Janovský
>> Alarex-Group s.r.o.
>>
>> mobil: +420 723 616 751
>> em na il: ondrej.janovsky na alarex.cz
>>
>> www.m2marchitect.cz
>> www.alarex.cz
>>
>> _______________________________________________
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>> Hw-list na list.hw.cz
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>>
>>
>> --
>> Ondřej Janovský
>> Alarex-Group s.r.o.
>>
>> mobil: +420 723 616 751
>> em na il: ondrej.janovsky na alarex.cz
>>
>> www.m2marchitect.cz
>> www.alarex.cz
>>
>> _______________________________________________
>> HW-list mailing list - sponsored by www.HW.cz
>> Hw-list na list.hw.cz
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> _______________________________________________
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--
*Ondřej Janovský
Alarex-Group s.r.o.
*
mobil: +420 723 616 751
em na il: ondrej.janovsky na alarex.cz
www.m2marchitect.cz <http://www.m2marchitect.cz>
www.alarex.cz <http://www.alarex.cz>
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