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/**********************************************************************<br>
* 2009 Microchip Technology Inc.<br>
*<br>
* FileName: deep_sleep.c<br>
* Dependencies: Header (.h) files if applicable, see below<br>
* Processor: PIC18F<br>
* Compiler: MCC18 v3.30 or higher<br>
*<br>
* SOFTWARE LICENSE AGREEMENT:<br>
* Microchip Technology Incorporated ("Microchip") retains all<br>
* ownership and intellectual property rights in the code
accompanying<br>
* this message and in all derivatives hereto. You may use this
code,<br>
* and any derivatives created by any person or entity by or on
your<br>
* behalf, exclusively with Microchip's proprietary products.
Your<br>
* acceptance and/or use of this code constitutes agreement to the<br>
* terms and conditions of this notice.<br>
*<br>
* CODE ACCOMPANYING THIS MESSAGE IS SUPPLIED BY MICROCHIP "AS
IS". NO<br>
* WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING,
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* NOT LIMITED TO, IMPLIED WARRANTIES OF NON-INFRINGEMENT,<br>
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO
THIS<br>
* CODE, ITS INTERACTION WITH MICROCHIP'S PRODUCTS, COMBINATION
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* ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.<br>
*<br>
* YOU ACKNOWLEDGE AND AGREE THAT, IN NO EVENT, SHALL MICROCHIP BE<br>
* LIABLE, WHETHER IN CONTRACT, WARRANTY, TORT (INCLUDING
NEGLIGENCE OR<br>
* BREACH OF STATUTORY DUTY), STRICT LIABILITY, INDEMNITY,<br>
* CONTRIBUTION, OR OTHERWISE, FOR ANY INDIRECT, SPECIAL,
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* DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWABLE BY
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* MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO
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* CODE, SHALL NOT EXCEED THE PRICE YOU PAID DIRECTLY TO MICROCHIP<br>
* SPECIFICALLY TO HAVE THIS CODE DEVELOPED.<br>
*<br>
* You agree that you are solely responsible for testing the code
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* determining its suitability. Microchip has no obligation to
modify,<br>
* test, certify, or support the code.<br>
*<br>
* REVISION HISTORY:<br>
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~<br>
* Author Date Comments on this revision<br>
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~<br>
* Harsha.J.M 04/04/09 First release of source file<br>
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~<br>
*<br>
* ADDITIONAL NOTES:<br>
* Code uses the Peripheral library support available with MCC18
Compiler<br>
* Code Tested on:<br>
* PIC18F46J50 controller<br>
* The Processor starts with the External Crystal (8 Mhz).<br>
*<br>
*<br>
* Hardware Implementation detalis<br>
*<br>
*----- Switch is connected to PORTA<3> pin which initiates
sequence to put the device into deep sleep upon switch pressing<br>
*----- PORTB<0> is connected to LED used for source of
inidication<br>
*<br>
* LED Indication Source of Wake up from deep sleep<br>
*<br>
* 1 blink ------------> Power on RESET<br>
* 2 blinks ------------> MCLR (active low
signal on master Reset pin)<br>
* 3 blinks ------------> RTCC (Real time
clock calender module)<br>
* 4 blinks ------------> DSWDT (Deep Sleep
watch dog timer)<br>
* 5 blinks ------------> Fault in configuring
Deep Sleep<br>
* 6 blinks ------------> Interrupt0 (INT0)<br>
* 7 blinks ------------> Brown out reset
(BOR)<br>
* 8 blinks ------------> Ultra Low Power
Wake UP (ULPWK)<br>
*<br>
**********************************************************************/<br>
/****************************************************************<br>
* To set CONFIG4 using the macro, the following line<br>
* can be pasted only at the beginning source code,<br>
* immediately below the '#include' directive.<br>
*<br>
** The following constants can be used to set CONFIG3L.<br>
**<br>
**<br>
; DSWDT Clock Select:<br>
; DSWDTOSC = T1OSCREF DSWDT uses T1OSC/T1CKI<br>
; DSWDTOSC = INTOSCREF DSWDT uses INTRC<br>
;<br>
; RTCC Clock Select:<br>
; RTCOSC = INTOSCREF RTCC uses INTRC<br>
; RTCOSC = T1OSCREF RTCC uses T1OSC/T1CKI<br>
;<br>
; Deep Sleep BOR:<br>
; DSBOREN = OFF Disabled<br>
; DSBOREN = ON Enabled<br>
;<br>
; Deep Sleep Watchdog Timer:<br>
; DSWDTEN = OFF Disabled<br>
; DSWDTEN = ON Enabled<br>
;<br>
; Deep Sleep Watchdog Postscaler :<br>
; DSWDTPS = 2 1:2 (2.1 ms)<br>
; DSWDTPS = 8 1:8 (8.3 ms)<br>
; DSWDTPS = 32 1:32 (33 ms)<br>
; DSWDTPS = 128 1:128 (132 ms)<br>
; DSWDTPS = 512 1:512 (528 ms)<br>
; DSWDTPS = 2048 1:2,048 (2.1 seconds)<br>
; DSWDTPS = 8192 1:8,192 (8.5 seconds)<br>
; DSWDTPS = K32 1:32,768 (34 seconds)<br>
; DSWDTPS = K131 1:131,072 (135 seconds)<br>
; DSWDTPS = K524 1:524,288 (9 minutes)<br>
; DSWDTPS = M2 1:2,097,152 (36 minutes)<br>
; DSWDTPS = M8 1:8,388,608 (2.4 hours)<br>
; DSWDTPS = M33 1:33,554,432 (9.6 hours)<br>
; DSWDTPS = M134 1:134,217,728 (38.5 hours)<br>
; DSWDTPS = M536 1:536,870,912 (6.4 days)<br>
; DSWDTPS = G2 1:2,147,483,648 (25.7 days)<br>
;<br>
; T1OSCEN Enforcement:<br>
; T1DIG = OFF Secondary Oscillator clock source may
not be selected<br>
; T1DIG = ON Secondary Oscillator clock source may
be selected<br>
;<br>
; Low-Power Timer1 Oscillator :<br>
; LPT1OSC = ON Low-power operation<br>
; LPT1OSC = OFF High-power operation<br>
<br>
* Oscillator is configured as HS<br>
* Fail safe monitor is enabled<br>
* watch dog timer is disabled<br>
* Extended instruction mode is disabled<br>
* oscillator switch over is enabled<br>
* CPU clock is not devided<br>
*****************************************************************/<br>
<br>
#define USE_OR_MASKS<br>
#include "p18f24j11.h"<br>
#include "dpslp.h"<br>
#include "pps.h"<br>
#define TRUE 1<br>
<br>
//************Configuration in
program*****************************<br>
<br>
#if defined(__18F46J50) //If the selected device if
PIC18F46J50, then apply below settings else user will have to set<br>
#pragma config DSWDTOSC = INTOSCREF, RTCOSC = INTOSCREF, DSBOREN =
ON, DSWDTEN = ON, DSWDTPS = 8192<br>
#pragma config T1DIG = ON, LPT1OSC = OFF<br>
#pragma config OSC=HS, FCMEN=ON, WDTEN=OFF, IESO=ON, XINST=OFF,
CPUDIV=OSC1<br>
#endif<br>
<br>
<br>
<br>
// CONFIG1L<br>
#pragma config WDTEN = OFF // Watchdog Timer (Disabled -
Controlled by SWDTEN bit)<br>
#pragma config STVREN = ON // Stack Overflow/Underflow Reset
(Enabled)<br>
#pragma config XINST = OFF // Extended Instruction Set
(Enabled)<br>
<br>
// CONFIG1H<br>
#pragma config CP0 = OFF // Code Protect (Program memory is
not code-protected)<br>
<br>
// CONFIG2L<br>
#pragma config OSC = INTOSC // Oscillator (INTOSCPLL)<br>
<br>
#pragma config T1DIG = ON // T1OSCEN Enforcement (Secondary
Oscillator clock source may be selected)<br>
#pragma config LPT1OSC = ON // Low-Power Timer1 Oscillator
(High-power operation)<br>
#pragma config FCMEN = ON // Fail-Safe Clock Monitor
(Enabled)<br>
#pragma config IESO = ON // Internal External Oscillator
Switch Over Mode (Enabled)<br>
<br>
// CONFIG2H<br>
#pragma config WDTPS = 32768 // Watchdog Postscaler (1:32768)<br>
<br>
// CONFIG3L<br>
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT
uses INTRC)<br>
#pragma config RTCOSC = T1OSCREF// RTCC Clock Select (RTCC uses
T1OSC/T1CKI)<br>
#pragma config DSBOREN = ON // Deep Sleep BOR (Enabled)<br>
#pragma config DSWDTEN = ON // Deep Sleep Watchdog Timer
(Enabled)<br>
#pragma config DSWDTPS = K32 // Deep Sleep Watchdog Postscaler
(1:2,147,483,648 (25.7 days))<br>
<br>
// CONFIG3H<br>
#pragma config IOL1WAY = ON // IOLOCK One-Way Set Enable bit
(The IOLOCK bit (PPSCON<0>) can be set once)<br>
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit
address masking mode)<br>
<br>
// CONFIG4L<br>
#pragma config WPFP = PAGE_15 // Write/Erase Protect Page
Start/End Location (Write Protect Program Flash Page 15)<br>
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region
Select (valid when WPDIS = 0) (Page WPFP<5:0> through
Configuration Words erase/write protected)<br>
#pragma config WPCFG = OFF // Write/Erase Protect
Configuration Region (Configuration Words page not
erase/write-protected)<br>
<br>
// CONFIG4H<br>
#pragma config WPDIS = OFF // Write Protect Disable bit
(WPFP<5:0>/WPEND region ignored)<br>
<br>
//Function Prototypes<br>
void user_main(void);<br>
unsigned char GetKey(void);<br>
void DebounceDelay(void);<br>
void SwitchInit(void);<br>
void Blink_LED(unsigned int number_of_blink);<br>
void Blink_LED2(unsigned int number_of_blink);<br>
void RTCC_configure(void);<br>
void goSleep(void);<br>
//Global structures used in deep sleep library<br>
<br>
SRC ptr;<br>
CONTEXT read_state;<br>
//rtccTimeDate RtccTimeDate, RtccAlrmTimeDate, Rtcc_read_TimeDate;<br>
<br>
<br>
<br>
void interrupt high_priority processHighInt(){<br>
if (INTCONbits.INT0F==1) {<br>
INTCONbits.INT0F = 0;<br>
goSleep();<br>
}<br>
}<br>
<br>
void goSleep(){<br>
INTCONbits.INT0IF = 0;<br>
NOP();<br>
NOP();<br>
INTCONbits.INT0IE = 1;<br>
NOP();<br>
NOP();<br>
WDTCONbits.REGSLP = 1;<br>
NOP();<br>
NOP();<br>
<br>
OSCCONbits.IDLEN = 0;<br>
DSCONHbits.RTCWDIS = 1;<br>
DSCONHbits.DSULPEN = 0;<br>
DSCONLbits.ULPWDIS = 1;<br>
DSCONLbits.DSBOR = 0;<br>
NOP();<br>
NOP();<br>
while(1){<br>
asm("bsf DSCONH, 7");<br>
asm("nop");<br>
asm("sleep");<br>
}<br>
<br>
} <br>
<br>
void main(void) {<br>
/*<br>
OSCTUNEbits.INTSRC = 0; //prepnuti na 31kHz INTRC<br>
OSCCONbits.IRCF = 0; //zapnuti frekvence na 31kHz<br>
*/<br>
ANCON1bits.PCFG12 = 1; //PORTB.RB0 je nastaven jako digitalni,
jinak nefunguje preruseni<br>
TRISB = 0x01;<br>
TRISC = 0x00;<br>
TRISA = 0x00;<br>
<br>
<br>
// Set up switch interrupt on INT0<br>
//INTCON2bits.INTEDG0 = 0; // interrupt on falling edge of
INT0 (switch pressed) RB0/INT0 - sestupna hrana<br>
INTCON2bits.RBPU = 1;<br>
//INTCONbits.INT0IF = 0; // ensure flag is cleared - priznak
preruseni je smazan<br>
//INTCONbits.INT0IE = 1; // enable INT0 interrupt - je zapnuto
preruseni na RB0/INT0<br>
// NOTE: INT0 is ALWAYS a high priority interrupt<br>
<br>
// Set up global interrupts<br>
RCONbits.IPEN = 1; // Enable priority levels on interrupts<br>
INTCONbits.GIEL = 1; // Low priority interrupts disabled!!! -
Povoli/zakaze preruseni nizke urovne<br>
INTCONbits.GIEH = 1; // Interrupting enabled. - Zapne vsechna
preruseni<br>
<br>
if (WDTCONbits.DS) //if this is the reset after the deep_sleep
wakup...then do this<br>
{<br>
DSCONLbits.RELEASE = 0;<br>
<br>
DSWAKEH = 0; //priznaky priciny se musi vynulovat<br>
DSWAKEL = 0;<br>
<br>
<br>
<br>
<br>
<br>
<br>
} else //else... this is the Normal (pure) Power_on Reset...do
the normal init<br>
{<br>
<br>
}<br>
goSleep();<br>
while (1);<br>
}<br>
<br>
<br>
<br>
<br>
<br>
Dne 22.10.2014 v 09:30 Jaromir Sukuba napsal(a):<br>
</div>
<blockquote
cite="mid:CAO2fjOmTtTXG55qbaJxJkcO=aRdYuvF5PvLe7t3G0jbQ9_j9qA@mail.gmail.com"
type="cite">
<pre wrap="">Moja prvotna reakcia bola - neverim! :-)
Tak ukazte minimalny kus kodu (menej nez 30 riadkov - teda nejaka
elementarna inicializacia a hned vstup do sleep rezimu), ktorym
demonstrujete ten velky odber.
2014-10-22 9:27 GMT+02:00 Ondřej Janovský <a class="moz-txt-link-rfc2396E" href="mailto:ondrej.janovsky@alarex.cz"><ondrej.janovsky@alarex.cz></a>:
</pre>
<blockquote type="cite">
<pre wrap="">Ani při TRISx jako výstupy se nic nemění :(
Dne 22.10.2014 v 09:19 Jaromir Sukuba napsal(a):
Kvizova otazka: co urobi digitalny vstup, ked plava vo vzduchu? ;-)
Skuste TRIS registre vynulovat (obsah prislusnych LAT registrov je
lahostajny, teda pokial na IO piny nie je nieco pripojene) a
pravdepodobne sa ta spotreba niekam pohne.
2014-10-22 9:15 GMT+02:00 Ondřej Janovský <a class="moz-txt-link-rfc2396E" href="mailto:ondrej.janovsky@alarex.cz"><ondrej.janovsky@alarex.cz></a>:
TRISx mám nahozené jako vstupy a IDLEN bit nastavuji na 0 podle dokumentace.
Dne 22.10.2014 v 09:11 Jaromir Sukuba napsal(a):
A TRISx registre mate v akom stave? IO piny su niekam pripojene?
Je skutocne v sleep rezime? Co IDLEN bit?
2014-10-22 9:02 GMT+02:00 Ondřej Janovský <a class="moz-txt-link-rfc2396E" href="mailto:ondrej.janovsky@alarex.cz"><ondrej.janovsky@alarex.cz></a>:
Ahoj,
nenašel by se prosím někdo, kdo by mi pomohl vyřešit záhadu? Pic má mít při
režimu DeepSleep spotřebu v řádech uA nebo dokonce nA. Ale mě se po uspání
dostane maximálně na hranici 400uA a níže ani trochu.
Přitom na něm nejsou pověšené žádné periferie, do Sleep režimu chodí a z něj
vystupuje na WDtimer jak má. Jen prostě žere jak nezavřený.
Oja
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</pre>
</blockquote>
<pre wrap="">_______________________________________________
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<div class="moz-signature">-- <br>
<b>Ondřej Janovský<br>
Alarex-Group s.r.o.<br>
</b>
<br>
mobil: +420 723 616 751<br>
em@il: <a class="moz-txt-link-abbreviated" href="mailto:ondrej.janovsky@alarex.cz">ondrej.janovsky@alarex.cz</a>
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