STM32F4xx problem UART DMA

[Jaroslav Buchta]

Ano, to jsem cetl, ale nemyslim, ze se DMA operace muze dostat mimo 
vyhrazeny bufer v interni . Problem vznika vlastne jen v pripade, ze se 
prolina Rx/Tx, pokud jen odesilam libovolnou kadenci, tak to myslim 
nikdy nespadlo.
  22.03.2016 v 23:10 Jan Waclawek napsal(a):
>> Pricinou je zda se priznak DMA TEIF
> Transfer error: the transfer error interrupt flag (TEIFx) is set when:
> – A bus error occurs during a DMA read or a write access
> – A write access is requested by software on a memory address register in
> Double
> buffer mode whereas the stream is enabled and the current target memory is
> the
> one impacted by the write into the memory address register (refer to
> Section 10.3.9: Double buffer mode)
>
> To prve je obdoba chyby ktora pri vykonavani programu sposobi Bus Fault
> procesora (pricom sa vsak obvykle kvoli spolocnemu vektoru vsetky faulty
> pokladaju za Hard Fault), teda napriklad ze nastal pokus pristupit k
> "neexistujucej" (nenamapovanej) pamati.
>
> wek
>
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