<div dir="ltr">Mel ho tam!</div><div class="gmail_extra"><br><div class="gmail_quote">Dne 5. listopadu 2014 20:44 Andrej Jancura <span dir="ltr"><<a href="mailto:aj.hwlist@gmail.com" target="_blank">aj.hwlist@gmail.com</a>></span> napsal(a):<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Tak mi to nedalo tiez a pozrel som to na 17´´... Hadajte co vyslo... :)))<div><div class="h5"><br><div class="gmail_extra"><br><div class="gmail_quote">2014-11-05 20:41 GMT+01:00 Jaroslav Buchta <span dir="ltr"><<a href="mailto:jaroslav.buchta@hascomp.cz" target="_blank">jaroslav.buchta@hascomp.cz</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div text="#000000" bgcolor="#FFFFFF">
<div>Asi nejaka starsi verze LCD s malym
rozlisenim ;-) sry, nedalo mi to ;-)<br>
A proc by to melo byt ujete? Pripada mi to prehledne, delsi zapis
IMHO nijak nevadi. Je to navic inicializace 2 DMA kanalu + jednoho
preruseni, jak jsem to namatkou vykopiroval ze zdrojaku.<br>
<br>
<br>
Dne 5. 11. 2014 20:36, Andrej Jancura napsal(a):<br>
</div><div><div>
<blockquote type="cite">
<div dir="ltr">
<div>
<div>No nech to je logicke ako chce, ja ten kod na svojom
netbooku vidim na troch obrazovkach... Nieco podobne ako
doobeda prepinanie hodin.<br>
<br>
</div>
Nezda sa Vam to trochu uletene?!<br>
<br>
</div>
A.<br>
</div>
<div class="gmail_extra"><br>
<div class="gmail_quote">2014-11-05 20:22 GMT+01:00 Jaroslav
Buchta <span dir="ltr"><<a href="mailto:jaroslav.buchta@hascomp.cz" target="_blank">jaroslav.buchta@hascomp.cz</a>></span>:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Mozna, no,
ale kdyz pouziju tu funkci, nemusim to resit ;-)<br>
Me prece jen napr. takovyto zapis prijde dost prehledny a
elegantni, po prekladu a optimalizaci to neni ani nejak
neefektivni.><br>
<br>
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);<br>
<br>
DMA_InitTypeDef DMA_InitStructure;<br>
<br>
DMA_StructInit(&DMA_InitStructure);<br>
/* USART1_Rx_DMA_Channel (triggered by USART1 Rx event)
Config */<br>
DMA_DeInit(DMA1_Channel5);<br>
DMA_InitStructure.DMA_PeripheralBaseAddr =
(uint32_t)&(USART1->DR); //USART1 DR<br>
DMA_InitStructure.DMA_MemoryBaseAddr =
(uint32_t)mstRcvBuf;<br>
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;<br>
DMA_InitStructure.DMA_BufferSize = MSTRCVBUFLEN;<br>
DMA_InitStructure.DMA_PeripheralInc =
DMA_PeripheralInc_Disable;<br>
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;<br>
DMA_InitStructure.DMA_PeripheralDataSize =
DMA_PeripheralDataSize_Byte;<br>
DMA_InitStructure.DMA_MemoryDataSize =
DMA_MemoryDataSize_Byte;<br>
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;<br>
DMA_InitStructure.DMA_Priority = DMA_Priority_High;<br>
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;<br>
DMA_Init(DMA1_Channel5, &DMA_InitStructure);<br>
<br>
<br>
DMA_StructInit(&DMA_InitStructure);<br>
/* USART1_Tx_DMA_Channel (triggered by USART1 Tx event)
Config */<br>
DMA_DeInit(DMA1_Channel4);<br>
DMA_InitStructure.DMA_PeripheralBaseAddr =
(uint32_t)&(USART1->DR); //USART1 DR<br>
DMA_InitStructure.DMA_MemoryBaseAddr =
(uint32_t)bufTxMaster;<br>
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;<br>
DMA_InitStructure.DMA_BufferSize = 1;<br>
DMA_InitStructure.DMA_PeripheralInc =
DMA_PeripheralInc_Disable;<br>
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;<br>
DMA_InitStructure.DMA_PeripheralDataSize =
DMA_PeripheralDataSize_Byte;<br>
DMA_InitStructure.DMA_MemoryDataSize =
DMA_MemoryDataSize_Byte;<br>
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;<br>
DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;<br>
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;<br>
DMA_Init(DMA1_Channel4, &DMA_InitStructure);<br>
<br>
<br>
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel5_IRQn;<br>
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority =
14;<br>
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;<br>
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;<br>
NVIC_Init(&NVIC_InitStructure);<br>
<br>
DMA_ITConfig(DMA1_Channel5, DMA_IT_HT| DMA_IT_TC,
ENABLE);<br>
<br>
/* Enable USART1 DMA RX request */<br>
USART_DMACmd(USART1, USART_DMAReq_Rx, ENABLE);<br>
/* Enable USART1 DMA TX request */<br>
USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE);<br>
<br>
DMA_Cmd(DMA1_Channel5, ENABLE);<br>
<br>
<br>
<br>
<br>
Dne 5. 11. 2014 19:53, Jan Waclawek napsal(a):
<div>
<div><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Treba inicializace DMA je podstatne jednodussi
naplnenim cca 15 polozek<br>
struktury dle nejakeho vzoroveho prikladu a pouzitim
funkce ...Init, nez<br>
hledanim jake registry jak nastavit a v jakem
poradi...<br>
</blockquote>
Zhodou okolnosti su to len 4 registre - zdojova
adresa, cielova adresa,<br>
pocet prenasanych poloziek a riadiaci register (plus
treba vynulovat<br>
status bity, t.j. spolu s tym je to 5) a v lubovolnom
poradi, kym sa to<br>
DMA nepovoli (tj najjednoduchsie je zapisovat do
kontrolneho nakoniec,<br>
inak je to jedno).<br>
<br>
S pozitim symbolov z stm32xxxx.h je to aj prehladne
(akurat si treba<br>
dopisat definicie poloziek pre bitove polia, KTORE BY
SOM AJ NA TOMTO<br>
MIESTE RAD POPROSIL OD PRITOMNYCH Z ST, ABY ICH
DOPLNILI), napr.<br>
<a href="http://www.efton.sk/STM32/bt.c" target="_blank">www.efton.sk/STM32/bt.c</a> spolu s
<a href="http://www.efton.sk/STM32/stm32f4xx.h.zip" target="_blank">www.efton.sk/STM32/stm32f4xx.h.zip</a><br>
<br>
wek<br>
<br>
<br>
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